Our technical writers have written hundreds of
manuals about semiconductors,
microprocessors, systems-on-chip (SOCs),
networking hardware and protocols,
software (applications, development tools, and operating systems), circuit
design and simulation tools, instruments, and semiconductor
processing equipment. The links
below show a few
examples.
|
|
 |
Sony Computer Entertainment's Guide to Cell/B.E. Programming Documentation. It describes the large range of CBE and PowerPC documentation available to PLAYSTATION 3 programmers and how to make the most efficient use of it.
|
|
|
 |
The Sony, Toshiba, IBM Cell
Broadband Engine Programming Handbook.
It describes how to write system and application software for
the Cell Broadband Engine (CBE) processor. Also see the Cell
Broadband Engine Programming Tutorial. |
 |
The Sony, Toshiba, IBM Cell
Broadband Engine Hardware Initialization Guide.
It describes how to bring up a system board that contains a
CBE processor, memory, and I/O
devices.
|
|
|
 |
A set of state-transition diagrams analyzing move-in and move-out
scenarios for non-deterministic state transitions. They are based on Karnaugh maps and are written for Electronic Data Interchange (EDI) protocol programmers.
We also designed a flow chart analyzing move-in and move-out scenarios and
their dependencies on other organizations. |
|
|
 |
The Internet Research Task Force (IRTF) Delay-Tolerant
Networks Tutorial. It describes the DTN architecture
and compares it with Internet TCP/IP concepts and protocols.
|
|
|
 |
The Synopsys Systems-on-Chip
for High-Speed Communication Systems white paper. It
describes design and partitioning issues for SoC devices used
in high-speed communication systems, such as 10Gbit Ethernet
routers and line cards.
See the derived article in CommsDesign magazine: Addressing
System-Level Challenges in High-Speed Comm Chips. |
|
|
 |
An excerpt from the PMC-Sierra
RM9000x2 Family Processor User Manual. It describes
networking line-card applications for the PMC-Sierra processor.
|
|
|
 |
The AMD
x86-64 Architecture Programmers Manual, a 5-volume set
totaling over 2,200 pages. It describes application and system
programming for the Advanced Micro Devices (AMD) 64-bit microprocessor
family.
A short excerpt can be seen in the Vector
Instructions example. |
|
|
 |
An excerpt from the above AMD
x86-64 Architecture Programmers Manual that gives an
overview of instructions for operating on vector operands. |
|
|
 |
The Xilinx Virtex-II
Pro PowerPC Processor Reference Guide. One of two manuals
describing a PowerPC processor core embedded in field-programmable
gate array (FPGA) logic.
Warthman Associates also wrote the Xilinx Virtex-II
Pro PowerPC405 Processor Block Reference Guide. |
|
|
|
An excerpt from an application programming interface
(API) architecture developed by Warthman Associates for network-animation
applications written in Java, such as the animations
on our web site. |
|
|
 |
The IBM PowerPC
Compiler Writer's Guide. It describes how to write compilers
for the PowerPC instruction set architecture (ISA).
A short excerpt can be seen in the Compiler
Branches example. |
|
|
 |
An excerpt from the above IBM PowerPC
Compiler Writer's Guide that includes code examples
for avoiding branches. |
|
|
|
The Intel Intel486™
Microprocessor Family Programmer's Reference Manual,
published with the two different covers shown here. Our work
on this manual represents over 90% of the Intel
PentiumŪ Processor Family Developer's Manual,Volume 3: Architecture
and Programming Manual. Later revisions, based on our
work but reorganized, edited and expanded to include all Pentium
processors, can be found in the Intel
Architecture Software Developer's Manual, Volume 1,
Volume
2, and Volume
3.
Warthman Associates also wrote Intel's:
80286 Hardware Reference
Manual
386 DX
Programmer's Reference Manual
386 DX Hardware Reference Manual
376 Programmer's Reference Manual
i486
Hardware Reference Manual |
|
|
 |
The NEC VR5432
Microprocessor User's Manual, a MIPS-architecture processor.
The manual is published in two parts, both of which are large PDF files that are formatted in NEC's standard page layout: the VR5432
User's Manual, volume 1, and the VR5432
User's Manual, volume 2.
Warthman Associates also wrote Tensilica's first set of manuals, for their configurable MIPS-based embedded processors and the GNU-based development tools used with them. |
|
|
 |
The Analog Devices ADSP-2100
Family User's Manual. Written for DSP-based hardware
and software developers. |
|
|
 |
The Hitachi (now Renesas) SH-DSP
7410 Hardware
Manual. The document we wrote was modified slightly
to become the SH7727
Hardware Manual.
Warthman Associates also wrote the SH-DSP
Programming Manual. |
|
|
 |
The Fujitsu SPARClite
MB8683x Data Sheet. One of three data sheets describing
SPARClite embedded processors.
Warthman Associates also wrote the Fujitsu SPARClite
MB8683x User's Guide and the original SPARClite
User's Guide. |
|
|
|
A diagram showing how addresses generated by
programs (called "effective addresses") are translated
into addresses that access memory (called "real addresses").
The diagram shows the mechanism used by a PowerPC microprocessor.
|
|
|
 |
An excerpt from nCUBE's nCUBE2
Programmer's Guide that describes how to partition
data in databases running on a parallel-processing supercomputer.
|
|
|
|
An excerpt from Nestor's Ni1000
Recognition Accelerator User's Guide that describes
the chip's classifier and microcontroller hardware architecture.
The chip was developed jointly by Nestor and Intel. |
|
|
|
 |
A diagram summarizing the fields and functions
of the Pentium™ Pro microprocessor's internal control registers,
with a text summary of each field. |
|
|
|
An excerpt from the AMD-K5™
Technical Reference Manual that describes the bus-snooping
method used to implement the processor's cache-coherency protocol.
Another excerpt form this manual summarizes interrupts
and exceptions. |
|
|
 |
An excerpt from Synergy Semiconductor's System
Elements Design Handbook that gives an overview of emitter-coupled
logic (ECL) circuit architecture. |
|
|
 |
The SRI ARPANET
IMP Port Expander. One of the earliest implementations
of the TCP/IP Internet protocols. |
|
|
|
An excerpt from Hitachi's D9000
Development System Hardware User Manual. It shows the
system baseboard used to develop hardware and software in the
Windows CE operating-system environment on Hitachi SH processors.
|
|
|
 |
LinkUp System's
L7200SDB Standard Development System Hardware User's Manual.
It describes a development system for hardware and software
using LinkUp’s ARM-based L720x Internet system processor.
Warthman Associates also wrote LinkUp's data books for their
L7200 and
L7205 DSP-Enhanced
Internet system processors, and their L1121
Data Sheet. |
|
|
 |
An annotated photograph from Varian's 3190
Cassette-to-Cassette Sputtering System Operation Manual
showing the location of components on the system's front plate.
|
|
|
 |
A page from KLA-Tencor's Alpha-Step
200 Data Sheet that describes and illustrates the operation
of this semiconductor test instrument. |
|
|
 |
An excerpt from Nestor's Ni1000
Recognition Accelerator User's Guide that summarizes
the methods by which the chip recognizes data patterns. |
|
|
 |
LinkUp System's
L1121
CompactFlash/PC Card Interface Chip Data Sheet.
It summarizes the technical aspects of LinkUp’s Flash
card interface chip.
Warthman Associates also wrote LinkUp's data books for their
L7200 and
L7205 DSP-Enhanced
Internet system processors. |
|
|
 |
An excerpt from Nestor's Ni1000
Recognition Accelerator Technical Specification. It
shows a typical organization for the opening sections of a semiconductor
data sheet. |
|
|
|
A description of an inquire operation
(also called a snoop operation) involving three chips.
|
|
|
|
A diagram that defines the mechanical dimensions
of a semiconductor chip's package. |
|
|
|
An excerpt from the 1976 Burroughs
B7000/B6000
Series CANDE Quick Guide that diagrammatically shows
the syntax of a command in a deterministic, unambiguous way.
Warthman Associates also wrote the accompanying Burroughs
B7000/B6000 Series CANDE User's Manual. |
|
|
|
An excerpt from Pretty Good Privacy's PGPmail
4.5 Quick Guide, a tutorial that explains the installation,
configuration, and day-to-day use of PGP's encryption program.
|
|
|
 |
A series of slides, first presented at the 2009 Design Automation Conference, that illustrate the concepts described in the article below. |
|
|
 |
A short tutorial on how to write maintainable and expandable engineering specifications. |
|
|
|
A short tutorial on how to write effective white
papers. |
