We write technical documentation about computer, microprocessor, multicore, graphics, network, semiconductor design and fabrication, financial, biomedical, and related hardware and software products. example

 

    

 

Examples of technical documents that Warthman Associates has written or edited

 


Technical Writing Examples for
Semiconductors and Software

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Networking and Communication

Mobile Industry Processor Interface (MIPI) Alliance specifications for cell phones and other mobile devices

We have edited many Mobile Industry Processor Interface (MIPI) Alliance specifications in support of cell phones and other mobile devices.

Altera Interlaken Megacore Function Users Guide example

Altera's Interlaken Megacore Function Users Guide describes their serial communication protocol for chip-to-chip packet transfers.

Delay-Tolerant Networks example

The Delay-Tolerant Networks Tutorial, written for the Internet Research Task Force (IRTF), describes the architecture of a mobile Internet protocol for Earth and outer-space.

PowerEN PCIe Card User Manual API example

IBM's PowerEN PCIe Card User Manual describes a card that uses an IBM PowerEN processor to monitor high-volume packet traffic in edge-of-network routers.

LinkUp L7205 Internet System Processor (ARM-based, DSP Enhanced) Databook example

NeoMagic's LinkUp L7205 Internet System Processor (DSP Enhanced) Databook describes the instructions and microarchitecture of their ARM-based, DSP-enhanced Internet processor.

Orbcomm's Machine-to-Machine (M2M) Provisioning Portal Developer API Specification example

Orbcomm's Machine-to-Machine (M2M) Provisioning Portal Developer API Specification defines their web services description language (WSDL) interface for satellite and cellular-network tracking.

AMD K9 Message Engine Architecture example

AMD's K9 Message Engine Architecture, describes a hardware accelerator design for high-speed message exchange.

Myricom's Datagram Bypass Layer (DBL) User Guide example

Myricom's Datagram Bypass Layer (DBL) User Guide describes their software for accelerating enterprise applications that depend on user datagram protocol (UDP) latency.

Multicore Communications API Specification example

The Multicore Association's Multicore Communications API (MCAPI) Specification supports interaction between multiple processing cores, as does their Multicore Resource API (MRAPI) Specification.

Synopsys Systems-on-Chip for High-Speed Communication Systems white paper example

The Synopsys Systems-on-Chip for High-Speed Communication Systems white paper describes design issues and solutions for ASIC-based SoCs used in broadband communications.

Analog Devices' ADSP-2100 Family User's Manual example

Analog Devices' AD6489 Integrated Broadband Communications Processor Programmers Reference Manual describes implementation of OSI Layer 3+ services.

PMC-Sierra RM9000x2 Integrated Multiprocessor networking SoC example

The PMC-Sierra RM9000x2 Integrated Multiprocessor User Manual describes a MIPS multiprocessor system-on-chip (SoC) for control- and data-plane network routing.

Ubicom IP2022 Internet Processor Data Sheet example

Ubicom's IP2022 Internet Processor Data Sheet describes an Internet processor that is reconfigurable over the Internet.

Sinett SN5024 Unified Wireless and Wired Edge-Switch Datasheet example

Sinett's SN5024 Unified Wireless and Wired Edge-Switch Datasheet describes a wireless and wired network edge switch.

Ditrans' DT3824 JAZZ CDMA/AMPS Tri-Mode, Dual-Band Receiver Data Sheet example

Ditrans' DT3824 JAZZ CDMA/AMPS Tri-Mode, Dual-Band Receiver Data Sheet describes a mixed-signal chip used in dual-band cell phones.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

Chameleon's CS2112 Reconfigurable Communications Processor Databook describes an FPGA for communication systems and Internet appliances.


Programming and Application Programming Interfaces (APIs)

Sony's PlayStation 4 Performance Optimization Guide example

Sony's PlayStation 4 Performance Optimization Guide describes best programming techniques for the graphics processing unit (GPU) used in this game platform.

PowerEN PCIe Card User Manual API example

IBM's PowerEN PCIe Card User Manual describes this single-board computer’s API function calls for parallel edge-of-network applications.

Multicore Association's Multicore Resource API (MRAPI) Specification example

Multicore Association's Multicore Resource API (MRAPI) Specification defines an API for management of shared resources in multicore embedded systems. See also the Multicore Communications API (MCAPI) Specification.

AMD x86-64 Architecture Programmers Manual example

AMD's x86-64 Architecture Programmers Manual describes and illustrates the use of their 64-bit x86 application- and system-programming instruction set.

MIPI Alliance Specification for Display Command Set example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Display Command Set specifies a graphic display command set used in cell phones and mobile devices.

Plurality's HyperCore Software Developer's Handbook example

Plurality's HyperCore Software Developer's Handbook describes a fine-grained, task-oriented programming model for parallel applications managed by a hardware synchronizer and scheduler.

LiMo API Document Guidelines

The Linux Mobile (LiMo) API Document Guidelines describes the API functions for a hardware-independent, generic application platform for Linux-based mobile devices.

Sony, Toshiba, IBM's (STI's) Cell Broadband Engine Programming Handbook example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Programming Handbook is a 900-page book describing programming for the nine heterogeneous cores used in the Sony PlayStation 3 game platform.

PortalPlayer Tango Software Developer's Guide example

NVIDIA's PortalPlayer Tango Software Developer's Guide describes the API functions for a hardware-specific audio device driver and LCD.

Alchemy Elemental Language (EL) Reference Manual example

ElementCXI's Alchemy Elemental Language (EL) Reference Manual explains a hardware description language (HDL) that is used as part of their CAD tools for reconfigurable logic.

Warthman Associates' Java API for network animation example

Warthman Associates' Java API for network animation is implemented in these animations on our web site.

Orbcomm's Machine-to-Machine (M2M) Provisioning Portal Developer API Specification example

ORBCOMM's Machine-to-Machine (M2M) Provisioning Portal Developer API Specification describes their web services description language (WSDL) interface for satellite and cellular-network asset tracking.

AMD/ATI Compute Abstraction Layer (CAL) Intermediate Language (IL) Reference Manual example

The AMD/ATI Compute Abstraction Layer (CAL) Intermediate Language (IL) Reference Manual describes the intermediate instructions used by their GPU compiler.

Analog Devices' AD6489 Integrated Broadband Communications Processor Programmers Reference Manual example

Analog Devices' AD6489 Integrated Broadband Communications Processor Programmers Reference Manual describes the software implementation of broadband services and physical interfaces.

MicroUnity's BroadMX C/C++ Functions manual example

MicroUnity's BroadMX C/C++ Functions manual describes an instruction-set architecture that includes many vector instructions for graphics, such as convolutions on complex floating-point operands.

MIPS-based Tensilica Instruction Set Architecture (ISA) Reference Manual example

Tensilica's Instruction Set Architecture (ISA) Reference Manual describes their instruction set and programming model for configurable embedded processors and intellectual-property (IP) cores.

Tensilica Instruction Extension (TIE) Reference Manual example

Tensilica's Instruction Extension (TIE) Reference Manual describes a software technology for creating new macro instructions using Verilog-like expressions.

Tensilica Xtensa Software Development Toolkit User's Guide example

Tensilica's Xtensa Software Development Toolkit User's Guide describes their GNU tool chain that supports software development for their configurable processors.

Chameleon CS2112 Reconfigurable Communications Processor Programming Guide example

Chameleon's CS2112 Reconfigurable Communications Processor Programming Guide describes the programming interface for an FPGA used in Internet appliances.

nCUBE 2 Supercomputers Parallel Programming Principles example

The nCUBE 2 Supercomputers Parallel Programming Principles manual describes the basic principles by which high-performance parallel programs can be created for nCube's supercomputers.

MageLang Institute's Java for C++ Programmer's Course Notes example

MageLang Institute's Java for C++ Programmer's Course Notes describes the similarities and differences between those two programming languages.

IBM's PowerPC Compiler Writer's Guide example

IBM's PowerPC Compiler Writer's Guide describes how to write a compiler for microprocessors that run the PowerPC instruction-set architecture.

Hitachi SH-DSP Programming Manual example

Hitachi's (now Renesas') SH-DSP Programming Manual describes the instruction-set architecture for their SH-DSP processors.

Hewlett-Packard's Business Store Developer's Guide XML example

Hewlett-Packard's Business Store Developer's Guide is a software developer's guide for the Hewlett-Packard business-store web site.

LiMo API Document Guidelines

IBM's Metaphor Database Design Reference Manual describes how to design and program enterprise SQL relational databases.


Graphics

Sony's PlayStation 4 Performance Optimization Guide example

Sony's PlayStation 4 Performance Optimization Guide describes the best programming techniques for the graphics processing unit (GPU) used in this game platform.

Sony, Toshiba, IBM's (STI's) Cell Broadband Engine Programming Handbook example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Programming Handbook describes programming for this Cell Processor chip, which is used in the Sony PlayStation 3 game platform.

AMD/ATI R600-Family Instructions Set Architecture example

The AMD/ATI R600-Family Instructions Set Architecture Manual describes the instructions for high-performance graphics processing units (GPUs).

AMD/ATI Compute Abstraction Layer (CAL) Intermediate Language (IL) Reference Manual example

The AMD/ATI Compute Abstraction Layer (CAL) Intermediate Language (IL) Reference Manual describes the intermediate instructions used by GPU compilers.

Sony's Guide to Cell/B.E. Programming Documentation for the Sony PlayStation 3 example

Sony's Guide to Cell/B.E. Programming Documentation for the Sony PlayStation 3, in which a PowerPC core manages eight SIMD cores.

MicroUnity's BroadMX C/C++ Functions manual example

MicroUnity's BroadMX C/C++ Functions manual describes a 128-bit architecture that includes many vector instructions for graphics, such as convolutions on complex floating-point operands.

3D graphics for DirectX, Direct3D, OpenCL, and OpenCL example

The MicroDesign Resources (MDR) 3D Technology Report is an architectural research paper about a variety of 3D-graphics chips.

Intel's 830M Chipset Mobile Graphics Controller manual example

Intel's 830M Chipset Mobile Graphics Controller manual describes an Intel graphics-controller technology for wireless mobile computers.

MicroUnity's BroadMX C/C++ Functions manual example

Fujitsu's SPARClite MB86937 Lumiere RISC Imaging Accelerator User's Manual describes an embedded processor with graphics acceleration implemented as a systems-on-chip (SoC).

Toshiba's TC8512 Gouraud Shading Graphics Processor Data Book example

Toshiba's TC8512 Gouraud Shading Graphics Processor Data Book describes a graphics processor that accelerates Gouraud shading on 3D images.

Zoran's ZR36031 JPEG Compression Processor Data Sheet example

Zoran's ZR36031 JPEG Compression Processor Data Sheet describes a JPEG compression chip used for graphic-image encoding and decoding.


Specifications and Standards

Mobile Industry Processor Interface (MIPI) Alliance specifications for cell phones and other mobile devices

We have edited many Mobile Industry Processor Interface (MIPI) Alliance Specifications in support of cell phones and other mobile devices. A few examples are shown below.

Mobile Industry Processor Interface (MIPI) Alliance UniPro 2.0 interface example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Unified Protocol (UniPro) v2.0 defines a layered protocol for interconnecting devices and components within mobile systems.

MIPI Alliance Camera Serial Interface 3 (CSI-3) example

The Mobile Industry Processor Interface (MIPI) Alliance's Camera Serial Interface 3 (CSI-3) specifies a serial interface for integration of camera subsystems and bridge devices with a host processor.

MIPI Alliance Specification for Battery Interface (BIF) example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Battery Interface (BIF) specifies a serial interface for integration of camera subsystems and bridge devices with a host processor.

MIPI Alliance Specification for Battery Interface (BIF) example

The MIPI Alliance's Specification for Unified Protocol (UniPro) SDL State Machines defines Specification and Description Language (SDL) state machines for cell phones and mobile devices.

MIPI Alliance Specification for Device Descriptor Block (DDB) example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Device Descriptor Block (DDB) specifies services that transfer descriptor and configuration data between devices on a MIPI Interconnect.

MIPI Alliance Specification for Serial Low-power Inter-chip Media Bus (SLIMbus) example

The MIPI Alliance's Specification for Serial Low-power Inter-chip Media Bus (SLIMbus) defines a two-wire multi-drop interface for digital audio and control devices.

Specification for RF Front-End (RFFE) Control Interface example

The MIPI Alliance's Specification for RF Front-End (RFFE) Control Interface defines a common method for controlling RF front-end devices.

MIPI Alliance Specification for NAND Software L2 Interface example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for NAND Software L2 Interface specifies the API for mobile devices that use embedded NAND and NAND-like devices.

Near Field Communication (NFC) Forum's Test Cases for Digital Protocol example

The Near Field Communication (NFC) Forum's Test Cases for Digital Protocol, one of several NFC standards that we edited.

Linux Mobile (LiMo) standards example

The Linux Mobile (LiMo) Foundation's Software Architecture Document, one of several Linux-based mobile-device standards that we edited in cooperation with the IEEE-ISTO.

LiMo API Document Guidelines

The Linux Mobile (LiMo) API Document Guidelines describes the API functions for a hardware-independent, generic application platform for Linux-based mobile devices.


Parallel Processing

Sony's PlayStation 4 Performance Optimization Guide example

Sony's PlayStation 4 Performance Optimization Guide describes the best parallel programming techniques for the graphics processing unit (GPU) used in this game platform.

AMD/ATI R600-Family Instructions Set Architecture example

The AMD/ATI R600-Family Instructions Set Architecture Manual describes the instructions for parallel high-performance graphics processing units (GPUs).

Adapteva's Epiphany Architecture Reference Manual example

Adapteva's Epiphany Architecture Reference Manual describes the instruction set, pipeline, and onchip network for their multicore parallel-computing fabric.

Plurality's HyperCore Software Developer's Handbook example

Plurality's HyperCore Software Developer's Handbook describes a fine-grained, task-oriented programming model for parallel applications managed by a hardware synchronizer and scheduler.

Multicore Resource API Specification example

The Multicore Association's Multicore Resource API (MRAPI) Specification defines an API for management of parallel, shared resources in multicore embedded systems.

PortalPlayer Tango Software Developer's Guide example

AMD's SimNow Simulator 3.0 User Manual describes a software simulator that supports BIOS and OS development and memory-parameter tuning in multicore parallel architectures.

Sony, Toshiba, IBM's (STI's) Cell Broadband Engine Programming Handbook example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Programming Handbook describes parallel programming for this Cell Processor chip, which is used in the Sony PlayStation 3 game platform.

nCUBE 2 Supercomputers Parallel Programming Principles example

This excerpt from the nCUBE 2 Supercomputers Parallel Programming Principles describes how to partition databases running on nCube parallel-processing supercomputers.


Multicore Processors

Adapteva parallel processing cores example

Adapteva's Epiphany Architecture Reference Manual describes a low-power multicore parallel computing fabric that connects many cores in a low-latency mesh network-on-chip (NoC).

Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual example

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual describes technical details about a family of FPGA logic devices with embedded ARM Cortex-A9 MPCores.

Multicore Communications API Specification example

The Multicore Association's Multicore Communications API (MCAPI) Specification supports interaction between multiple processing cores, as does their Multicore Resource API (MRAPI) Specification.

Plurality parallel cores example

Plurality's HyperCore Architecture White Paper summarizes and illustrates their shared-memory multicore architecture for parallel applications.

Plurality parallel cores example

Plurality's HyperCore Software Developer's Handbook describes a fine-grained, task-oriented programming model for multicore parallel applications managed by a hardware synchronizer and scheduler.

Sony, Toshiba, IBM's (STI's) Cell Broadband Engine Programming Handbook example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Programming Handbook is a 900-page book describing programming for nine heterogeneous cores. The chip is used in the Sony PlayStation 3 game platform.

MIPS-based Tensilica Instruction Set Architecture (ISA) Reference Manual example

Tensilica's Vectra DSP Engine Data Sheet describes a vector-instruction DSP pipeline architecture for their multi-configurable intellectual-property (IP) cores.

PMC-Sierra RM9000x2 Integrated Multiprocessor networking SoC example

The PMC-Sierra RM9000x2 Integrated Multiprocessor User Manual describes a chip with multiple MIPS processor cores and supporting logic for network routing.

Plurality parallel cores example

Ceva's Corporate Web Site describes their DSP multicores and the software and hardware development platforms used to embed them into systems-on-chip (SoCs).

picoTurbo-ARM-Compatible-pT-110-Hardware-Design-Users-Guide example

The picoTurbo pT-110 Hardware Design Users Guide describes how to design SoCs with multiple ARM-compatible processor cores.

Xilinx PPC405 User Manual for the Virtex-II Pro Platform FPGA Developer’s Kit example

The Xilinx PPC405 User Manual for the Virtex-II Pro Platform FPGA Developer’s Kit describes a PowerPC processor core embedded in field-programmable gate array (FPGA) logic.

PortalPlayer PP5001 Superintegration System-on-Chip Controller Databook example

NVIDIA's PortalPlayer PP5001 Superintegration System-on-Chip Controller Databook describes the microarchitecture and programming of a multicore SoC for audio media.

Ubicom IP2022 Internet Processor Data Sheet example

Ubicom's IP2022 Internet Processor Data Sheet describes a multicore Internet processor architecture that is reconfigurable over the Internet.

Fujitsu SPARClite MB8683x Data Sheet and SPARClite MB8683x User's Guide example

Fujitsu's SPARClite MB8683x Data Sheet and SPARClite MB8683x User's Guide describe the features of their multiple embedded processor cores.


RISC Processors

Adapteva's Epiphany Architecture Reference Manual example

Adapteva's Epiphany Architecture Reference Manual describes its RISC instruction set, pipeline, and onchip network for their multicore parallel-computing fabric.

Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual example

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual describes a family of FPGA logic devices with embedded ARM RISC cores. See ARM for more RISC processors.

Sony, Toshiba, IBM's (STI's) Cell Broadband Engine Programming Handbook example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Programming Handbook describes programming for nine heterogeneous RISC cores. See PowerPC for more RISC processors.

Xilinx PPC405 User Manual for the Virtex-II Pro Platform FPGA Developer’s Kit example

The Xilinx PPC405 User Manual for the Virtex-II Pro Platform FPGA Developer’s Kit describes a PowerPC RISC processor core embedded in FPGA logic. See PowerPC for more RISC processors.

MIPS-based Tensilica Instruction Set Architecture (ISA) Reference Manual example

Tensilica's Xtensa Instruction Set Architecture (ISA) Reference Manual describes their MIPS RISC instructions and programming model. See MIPS for more RISC processors.

picoTurbo pT-120 Hardware Core Data Sheet example

picoTurbo's pT-120 Hardware Core Data Sheet describes an ARM-compatible processor core designed for systems-on-chips (SoCs). See ARM for more RISC processors.

MIPS Corporation Brochure example

The MIPS Corporation Brochure gives an overview of the company's history, products, and markets. See MIPS for more RISC processors.

PMC-Sierra RM9000x2 Integrated Multiprocessor networking SoC example

The PMC-Sierra RM9000x2 Integrated Multiprocessor User Manual describes a MIPS multiprocessor system-on-chip (SoC) for control- and data-plane network routing.

LinkUp L7205 Internet System Processor (ARM-based, DSP Enhanced) Databook example

NeoMagic's LinkUp L7205 Internet System Processor (DSP Enhanced) Databook describes the instructions and microarchitecture of their ARM-based, DSP-enhanced Internet processor. See ARM for more RISC processors.

NEC VR5400 MIPS Processor Product Brief example

NEC's VR5400 MIPS Processor Product Brief describes the processors and system controllers in this family of MIPS chips. See MIPS for more RISC processors.

MicroUnity's BroadMX C/C++ Functions manual example

Fujitsu's SPARClite MB86937 Lumiere RISC Imaging Accelerator User's Manual describes an SPARC-based embedded processor with graphics acceleration implemented as a systems-on-chip (SOC). See SPARC for more RISC processors.

MicroUnity's BroadMX C/C++ Functions manual example

Fujitsu's SPARClite Microprocessor User's Guide describes this RISC processor's microarchitecture and instructions. See SPARC for more RISC processors.

IDT's IDT79R5000 RISC Microprocessor Reference Manual example

IDT's IDT79R5000 RISC Microprocessor Reference Manual describes the MIPS-architecture instruction set for this processor. See MIPS for more RISC processors.

AMD's Am29000 Microprocessor Memory Design Handbook example

AMD's Am29050 Microprocessor User's Manual describes this RISC processor's microarchitecture and instruction-set architecture.


x86 Processors

AMD x86-64 Architecture Programmers Manual example

The AMD x86-64 Architecture Programmers Manual, describes their 64-bit x86 application- and system-programming instruction set. See AMD for more of our x86 documents.

AMD K9 Message Engine Architecture example

AMD's K9 Message Engine Architecture, describes a hardware accelerator design for high-speed message exchange.

NexGen's Nx686/Nx687 Processor and Floating-Point Coprocessor Databook example

NexGen's Nx686/Nx687 Processor and Floating-Point Coprocessor Databook describes the signal interface and timing of these x86 processors.

NexGen's Nx586 Processor Databook example

NexGen's Nx586 Processor Databook describes their implementation of the x86 architecture. We also wrote their Nx686/Nx687 Processor Databook.

Intel's Pentium™ Pro microprocessor internal control registers example

This diagram summarizes the fields and functions of Intel's Pentium Pro x86 internal control registers, with a text summary of each field.

UMC's U5S 486 Green CPU Data Book example

UMC's U5S 486 Green CPU Data Book describes the instruction set and signal interface of this x86 processor.

AMD-K5™ Technical Reference Manual describes the snooping function example

The AMD-K5™ Technical Reference Manual describes the snooping function used in the processor's cache-coherency protocol.

Intel486™ Microprocessor Family Programmer's Reference Manual example

Intel's 486 Microprocessor Family Programmer's Reference Manual describes the complete 486 instruction set and programming model. See Intel for more of our x86 documents.


PowerPC Processors

IBM's PowerEN PCIe Card User Manual example

IBM's PowerEN PCIe Card User Manual describes a card that uses an IBM PowerEN processor to monitor high-volume packet traffic in edge-of-network routers.

Sony's Guide to Cell/B.E. Programming Documentation for the Sony PlayStation 3 example

Sony's Guide to Cell/B.E. Programming Documentation for the Sony PlayStation 3, in which a PowerPC core manages eight SIMD cores. We also wrote the Cell Broadband Engine Programming Handbook.

Sony, Toshiba, IBM's (STI's) Cell Broadband Engine Programming Handbook example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Programming Handbook describes parallel programming for this Cell Processor chip, which is used in the Sony PlayStation 3 game platform.

Xilinx PPC405 User Manual for the Virtex-II Pro Platform FPGA Developer’s Kit example

The Xilinx PPC405 User Manual for the Virtex-II Pro Platform FPGA Developer’s Kit describes a PowerPC processor core embedded in field-programmable gate array (FPGA) logic.

IBM's PowerPC Tools catalog example

IBM's PowerPC Tools catalog describes the system-software and hardware tools that support system development based on PowerPC microprocessors.

IBM's PowerPC Compiler Writer's Guide example

IBM's PowerPC Compiler Writer's Guide describes how to write a compiler for microprocessors that run the PowerPC instruction set architecture (ISA).

PowerPC microprocessor addresses example

We created this diagram for PowerPC microprocessors to show how addresses generated by programs (called "effective addresses") are translated into addresses that access memory (called "real addresses").


ARM Processors

Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual example

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual describes technical details about a family of FPGA logic devices with embedded ARM Cortex-A9 MPCores.

picoTurbo pT-120 Hardware Core Data Sheet example

picoTurbo's pT-120 Hardware Core Data Sheet describes technical details about this ARM-compatible processor core that is designed for systems-on-chips (SoCs).

picoTurbo-ARM-Compatible-pT-110-Hardware-Design-Users-Guide example

picoTurbo's pT-110 Hardware Design User's Guide describes how to design SoCs with this ARM-compatible processor core.

LinkUp L7205 Internet System Processor (ARM-based, DSP Enhanced) Databook example

NeoMagic's LinkUp L7205 Internet System Processor (DSP Enhanced) Databook describes the instructions and microarchitecture of their ARM-based, DSP-enhanced Internet processor.

LinkUp System's L7200SDB Standard Development System Hardware User's Manual example

NeoMagic's LinkUp L7200SDB Standard Development System Hardware User's Manual describes a hardware development system for LinkUp's ARM-based L7200 and L7205 Internet system processors.


MIPS Processors

MIPS-based Tensilica Instruction Set Architecture (ISA) Reference Manual example

Tensilica's Xtensa Instruction Set Architecture (ISA) Reference Manual describes their MIPS instructions and programming model. We also wrote their instruction-extension manuals.

PMC-Sierra RM9000x2 Integrated Multiprocessor networking SoC example

The PMC-Sierra RM9000x2 Integrated Multiprocessor User Manual describes a MIPS multiprocessor system-on-chip (SoC) for control- and data-plane network routing.

MIPS Corporation Brochure example

The MIPS Corporation Brochure gives an overview of the company's history, products, and markets.

NEC VR5400 MIPS Processor Product Brief example

NEC's VR5400 MIPS Processor Product Brief describes the processors and system controllers in this family of MIPS chips.

VR5464 MIPS Processor User's Manual example

NEC's VR5464 MIPS Processor User's Manual describes the instruction-set architecture (ISA) and hardware of a 64-bit MIPS microprocessor.

NEC VRC5074 MIPS System Controller Data Sheet example

NEC's VRC5074 MIPS System Controller Data Sheet describes the interfaces and configuration of a MIPS controller.

IDT's IDT79R5000 RISC Microprocessor Reference Manual example

IDT's IDT79R5000 RISC Microprocessor Reference Manual describes the MIPS-architecture instruction set for this processor.


SPARC Processors

Fujitsu's SPARClite MB86831 Data Sheet example

Fujitsu's SPARClite MB86831 Data Sheet describe the signal interface and register set of a family of SPARClite embedded processors.

Fujitsu SPARClite MB8683x Data Sheet and SPARClite MB8683x User's Guide example

Fujitsu's SPARClite MB8683x User's Guide describes the programming of a family of SPARClite embedded processors.

MicroUnity's BroadMX C/C++ Functions manual example

Fujitsu's SPARClite MB86937 Lumiere RISC Imaging Accelerator User's Manual describes an embedded processor with graphics acceleration implemented as an SoC.

Fujitsu's SPARClite User's Guide example

Fujitsu's SPARClite User's Guide describes this embedded processor's hardware microarchitecture and instruction-set architecture.


System on Chip (SoC), ASIC, and ASSP

Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual example

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual describes technical details about a family of FPGA logic devices with embedded ARM Cortex-A9 MPCores.

Mobile Industry Processor Interface (MIPI) Alliance specifications for cell phones and other mobile devices

We have edited many Mobile Industry Processor Interface (MIPI) Alliance specifications in support of SoCs for cell phones and other mobile devices.

Synopsys Systems-on-Chip for High-Speed Communication Systems white paper example

The Synopsys Systems-on-Chip for High-Speed Communication Systems white paper describes design issues and solutions for ASIC-based SoCs used in broadband communications.

PortalPlayer PP5001 Superintegration System-on-Chip Controller Databook example

NVIDIA's PortalPlayer PP5001 Superintegration System-on-Chip Controller Databook describes the microarchitecture and programming of an SoC core for audio appliances.

picoTurbo pT-100 Hardware Core Data Sheet example

The picoTurbo pT-100 Hardware Core Data Sheet describes hardware details about this ARM-compatible processor core designed for use in SoCs.

MicroUnity's BroadMX C/C++ Functions manual example

Fujitsu's SPARClite MB86937 Lumiere RISC Imaging Accelerator User's Manual describes an embedded processor with graphics acceleration implemented as an SoC.

PMC-Sierra RM9000x2 Integrated Multiprocessor User Manual example

The PMC-Sierra RM9000x2 Integrated Multiprocessor User Manual describes a MIPS-architecture multiprocessor SoC for control- and data-plane network routing.

Plurality parallel cores example

Ceva's Corporate Web Site describes their DSP multicores and the software and hardware development platforms used to embed them into systems-on-chip (SoCs).


Memory

Memoir 2R1W Memory IP Core for SRAM Datasheet example

Memoir's 2R1W Memory IP Core for SRAM Datasheet describes a memory IP core that wraps around standard one-port SRAM1D macros to support two-port functionality.

Sony, Toshiba, IBM's (STI's) Cell Broadband Engine Programming Handbook example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Programming Handbook contains a chapter on memory organization that covers system and application memory for all nine processors on the chip.

PowerPC microprocessor addresses example

We created this diagram for PowerPC microprocessors to show how addresses generated by programs (called "effective addresses") are translated into addresses that access memory (called "real addresses").

AMD's Am29000 Microprocessor Memory Design Handbook example

AMD's Am29000 Microprocessor Memory Design Handbook provides detailed examples of memory design for the Am29000 RISC microprocessors.

AMD's Am29000 Microprocessor Memory Design Handbook example

Renesas Hitachi's Synchronous Static RAM Application Note describes and illustrates examples of SSRAM cache memory design.

Zilog Z80 DMA Technical Manual example

Zilog's Z80 DMA Technical Manual describes the DMA's signal interface and programming for memory-to-memory transfers.

WaferScale Integration MAP168 Mapable Memory Controller Data Sheet example

STMicroelectronics' WaferScale Integration MAP168 Mapable Memory Controller Data Sheet describes the signal interface and programming of a memory-controller chip.


Peripherals and I/O

MIPI Alliance Camera Serial Interface 3 (CSI-3) example

The Mobile Industry Processor Interface (MIPI) Alliance's Camera Serial Interface 3 (CSI-3) specifies a serial interface for integration of camera subsystems and bridge devices with a host processor.

MIPI Alliance Specification for Display Serial Interface example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Display Serial Interface specifies a graphic Display Serial Interface (DSI) used in cell phones and mobile devices.

MIPI Alliance Specification for Battery Interface (BIF) example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Battery Interface (BIF) specifies a serial interface for integration of camera subsystems and bridge devices with a host processor.

MIPI Alliance Specification for Device Descriptor Block (DDB) example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Device Descriptor Block (DDB) specifies services that transfer descriptor and configuration data between devices on a MIPI Interconnect.

Ubicom's SX Virtual Peripheral Methodology and Modules User's Manual example

Ubicom's SX Virtual Peripheral Methodology and Modules User's Manual describes the use of a set of virtual peripheral modules.

Standard Microsystems Corporation (SMSC) LPC47N359 Mobile Embedded System Controller Specification example

The Standard Microsystems Corporation (SMSC) LPC47N359 Mobile Embedded System Controller Specification describes a mobile embedded system controller with LPC, ACPI, SPI, SFI, UART, PS/2, Flash, and debug interfaces.

NeoMagic LinkUp L1121 CompactFlash/PC Card Interface Chip Data Sheet example

NeoMagic's LinkUp L1121 CompactFlash/PC Card Interface Chip Data Sheet describes their their L1121 Flash card peripheral-interface chip.

NEC VRC5074 MIPS System Controller Data Sheet example

NEC's VRC5074 MIPS System Controller Data Sheet describes the peripheral interfaces and configuration of a MIPS controller.

Cirrus Logic Voyager CL-PS7000 Apple Newton PCA Chip Set Engineering Specification example

Cirrus Logic's Voyager CL-PS7000 Apple Newton PCA Chip Set Engineering Specification specifies a peripheral-controller chip used in the Apple Newton mobile device.

Zilog Z80 DMA and SIO Data Sheets example

Zilog's Z80 DMA and SIO Data Sheets describes the Z80 peripherals and the programming of their interfaces and drivers.

Zilog Z80 DMA Technical Manual example

Zilog's Z80 DMA Technical Manual describes the DMA's programming and its signal interface to memory and the CPU.

ZyMOS System 90/SX Chip Set Design Manual example

ZyMOS's System 90/SX Chip Set Design Manual describes the board design for their system controller chip.


Field-Programmable Gate Arrays (FPGAs)

Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual example

The Xilinx Zynq-7000 Extensible Processing Platform (EPP) Reference Manual describes technical details about a family of FPGA logic devices with embedded ARM Cortex-A9 MPCores.

Altera Interlaken Megacore Function Users Guide example

Altera's Interlaken Megacore Function Users Guide describes their serial communication protocol for chip-to-chip packet transfers.

Synopsys' FPGA-Based Prototyping Methodology Manual example

Synopsys' FPGA-Based Prototyping Methodology Manual describes a systematic method for prototyping chips and boards using FPGA logic.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

The ElementCXI Elemental Computing Array Principles describes a programmable-logic system and the CAD tools used to create it.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

The ElementCXI Alchemy Function Library describes the logic-function libraries used to configure a programmable-logic chip family.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

Chameleon's CS2112 Reconfigurable Communications Processor Databook describes an FPGA for communication systems and Internet appliances.

Xilinx Virtex-II Pro PPC405 User Manual example

The Xilinx PPC405 User Manual for the Virtex-II Pro Platform FPGA Developer’s Kit describes how to configure FPGA logic that surrounds an embedded PowerPC processor core.

Xilinx Advanced CAD Technology (XACT) User's Manual example

Xilinx's Logic Cell Array (LCA) User's Manual describes the hardware for a product line of reconfigurable FPGA logic.

Xilinx Advanced CAD Technology (XACT) User's Manual example

The Xilinx Advanced CAD Technology (XACT) User's Manual describes the computer-aided design (CAD) tools used for implementing their Logic Cell Array (LCA) FPGAs.


RF and GPS

Near Field Communication (NFC) Forum's Test Cases for Digital Protocol example

The Near Field Communication (NFC) Forum's Test Cases for Digital Protocol specifies test methods used for near-field devices, which are based on radio-frequency identification (RFID) standards.

Mobile Industry Processor Interface (MIPI) Alliance specifications for cell phones and other mobile devices

We have edited many Mobile Industry Processor Interface (MIPI) Alliance specifications, most of which include RF in support of cell phones and other mobile devices.

Specification for RF Front-End (RFFE) Control Interface example

The MIPI Alliance's Specification for RF Front-End (RFFE) Control Interface defines a common method for controlling RF front-end devices.

Specification for DigRF v4 example

The MIPI Alliance's Specification for DigRF defines the interface between Baseband ICs (BBICs) and Radio Frequency ICs (RFICs) in a single terminal.

SiRF's GSD4t GPS Hardware and Software Databook example

SiRF's GSD4t GPS Hardware and Software Databook describes a mixed-signal global positioning system (GPS) chip that is designed for use in cell phones and mobile navigation devices.

Sinett SN5024 Unified Wireless and Wired Edge-Switch Datasheet example

Sinett's SN5024 Unified Wireless and Wired Edge-Switch Datasheet describes a wireless and wired network edge switch.

Ditrans' DT3824 JAZZ CDMA/AMPS Tri-Mode, Dual-Band Receiver Data Sheet example

Ditrans' DT3824 JAZZ CDMA/AMPS Tri-Mode, Dual-Band Receiver Data Sheet describes a mixed-signal chip used in dual-band cell phones.

Wheels of Zeus (WoZ) Global Positioning System (GPS) Preliminary Engineering Specification Proposa example

Wheels of Zeus (WoZ) Global Positioning System (GPS) Preliminary Engineering Specification Proposal describes the hardware and software parameters for a GPS microchip.

Tchip's IP1012 Global Positioning System (GPS) Receiver Baseband Data Sheet example

Tchip's IP1012 Global Positioning System (GPS) Receiver Baseband Data Sheet describes a baseband (non-modulated) receiver chip used in GPS devices.


Digital Signal Processors (DSPs)

LinkUp L7205 Internet System Processor (ARM-based, DSP Enhanced) Databook example

NeoMagic's LinkUp L7205 Internet System Processor (DSP Enhanced) Databook describes the instructions and microarchitecture of their ARM-based, DSP-enhanced Internet processor.

Plurality parallel cores example

Ceva's Corporate Web Site describes their DSP cores and the software and hardware development platforms used to embed them into systems-on-chip (SoCs).

MIPS-based Tensilica Instruction Set Architecture (ISA) Reference Manual example

Tensilica's Vectra DSP Engine Data Sheet describes a vector-instruction DSP pipeline architecture for their configurable intellectual-property (IP) cores.

Hitachi's SH-DSP 7410 Hardware Manual and SH-DSP Programming Manual example

Conexant's Countach-40 DSP Architecture Reference Manual describes the processor's instruction set and programming model.

Hitachi's SH-DSP 7410 Hardware Manual and SH-DSP Programming Manual example

Hitachi's (now Renesas') SH-DSP 7410 Hardware Manual describes the microarchitecture of an SH-DSP processor. We also wrote their SH-DSP Programming Manual.

Analog Devices' ADSP-2100 Family User's Manual example

Analog Devices' ADSP-2100 Family User's Manual describes the hardware architecture and instruction-set architecture of this family of DSP chips.


Cell Phones and Mobile Devices

Mobile Industry Processor Interface (MIPI) Alliance specifications for cell phones and other mobile devices

We have edited many Mobile Industry Processor Interface (MIPI) Alliance Specifications in support of cell phones and other mobile devices. A few examples are shown below.

Mobile Industry Processor Interface (MIPI) Alliance UniPro 2.0 interface example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Unified Protocol (UniPro) v2.0 defines a layered protocol for interconnecting devices and components within mobile systems.

MIPI Alliance Camera Serial Interface 3 (CSI-3) example

The Mobile Industry Processor Interface (MIPI) Alliance's Camera Serial Interface 3 (CSI-3) specifies a serial interface for integration of camera subsystems and bridge devices with a host processor.

MIPI Alliance Specification for Battery Interface (BIF) example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Battery Interface (BIF) specifies a serial interface for integration of camera subsystems and bridge devices with a host processor.

MIPI Alliance Specification for Battery Interface (BIF) example

The MIPI Alliance's Specification for Unified Protocol (UniPro) SDL State Machines defines Specification and Description Language (SDL) state machines for cell phones and mobile devices.

MIPI Alliance Specification for Device Descriptor Block (DDB) example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Device Descriptor Block (DDB) specifies services that transfer descriptor and configuration data between devices on a MIPI Interconnect.

MIPI Alliance Specification for Serial Low-power Inter-chip Media Bus (SLIMbus) example

The MIPI Alliance's Specification for Serial Low-power Inter-chip Media Bus (SLIMbus) defines a two-wire multi-drop interface for digital audio and control devices.

Specification for RF Front-End (RFFE) Control Interface example

The MIPI Alliance's Specification for RF Front-End (RFFE) Control Interface defines a common method for controlling RF front-end devices.

MIPI Alliance Specification for NAND Software L2 Interface example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for NAND Software L2 Interface specifies the API for mobile devices that use embedded NAND and NAND-like devices.

Near Field Communication (NFC) Forum's Test Cases for Digital Protocol example

The Near Field Communication (NFC) Forum's Test Cases for Digital Protocol, one of several NFC standards that we have edited.

Linux Mobile (LiMo) standards example

The Linux Mobile (LiMo) Foundation's Software Architecture Document, one of several Linux-based mobile-device standards that we edited in cooperation with the IEEE-ISTO.

SiRF's GSD4t GPS Hardware and Software Databook example

SiRF's GSD4t GPS Hardware and Software Databook describes a mixed-signal global positioning system (GPS) chip that is designed for use in cell phones and mobile navigation devices.

Ditrans' DT3824 JAZZ CDMA/AMPS Tri-Mode, Dual-Band Receiver Data Sheet example

Ditrans' DT3824 JAZZ CDMA/AMPS Tri-Mode, Dual-Band Receiver Data Sheet describes a mixed-signal chip used in dual-band cell phones.

Wheels of Zeus (WoZ) Global Positioning System (GPS) Preliminary Engineering Specification Proposa example

Wheels of Zeus (WoZ) Global Positioning System (GPS) Preliminary Engineering Specification Proposal describes the hardware and software parameters for a GPS microchip.

Tchip's IP1012 Global Positioning System (GPS) Receiver Baseband Data Sheet example

Tchip's IP1012 Global Positioning System (GPS) Receiver Baseband Data Sheet describes a baseband (non-modulated) receiver chip used in GPS devices.


Computer Systems

PDS Digital and Analog Video Switcher User's Guide example

Barco's PDS Digital and Analog Video Switcher User's Guide describes its digital-signage processor, video scaler, scan converter, switcher, and transcoder.

Nanosphere Verigene Molecular Diagnostics System User's Manual example

Nanosphere's Verigene Molecular Diagnostics System User's Manual describes a molecular diagnostics workstation used in medical and molecular biology research and clinical applications.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

Siemen's Cluster Framework (SCF) Overview describes a server clustering system that supports enterprise web sites, storage networks, and data bases with load-balancing and firewall security.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

Texas Instruments' National Semiconductor System/400 Summary describes an IBM-compatible mainframe and its storage and communications peripherals.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

IBM's Metaphor Database Server 200 Operations Manual describes a network-based server supporting SQL relational databases.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

MAD Intelligent Systems' D3000 System Customer Engineer's Manual describes the architecture and functions of the circuit boards for an x86-based OEM computer system.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

Convergent Technologies' IWS Workstation Hardware Manual describes an OEM workstation for computer-system manufacturers.

Saudi Consolidated Electric's SICON Jubail System Engineer's Manual example

Saudi Consolidated Electric's SICON Jubail System Engineer's Manual describes a system control and data acquisition (SCADA) system for airports and electric-power systems in Saudi Arabia.

Apple Lisa Owner's Guide example

Apple's Lisa Owner's Guide describes how to install and maintain all of the user hardware and software features of the Lisa computer system.

Apple Lisa Owner's Guide example

GRiD Systems' Getting Started with the GRiD Compass describes the user software and hardware features of a mobile laptop computer.


Development Systems and Tools

MIPI Alliance Specification for NAND Software L2 Interface example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for Processor Interface Emulation specifies the architecture for an emulator of the processor-interface used in cell phones and mobile devices.

AMD/ATI Compute Abstraction Layer (CAL) Intermediate Language (IL) Reference Manual example

The AMD/ATI Compute Abstraction Layer (CAL) Intermediate Language (IL) Reference Manual describes the intermediate instructions used by GPU compilers.

Chameleon CS2112 Reconfigurable Communications Processor Databook example

ElementCXI's Elemental Computing Array Principles describes a reconfigurable logic system and the CAD tools used to create it.

PortalPlayer Tango Software Developer's Guide example

ElementCXI's Alchemy Design Tools ECA-64 Tutorial describes the CAD tools used to create its reconfigurable logic.

Plurality's HyperCore Software Developer's Handbook example

Plurality's HyperCore Software Developer's Handbook describes a software development environment for their parallel task-oriented programming model.

Hitachi's D9000 Development System Hardware User Manual example

Hitachi's D9000 Development System Hardware User Manual describes how to develop hardware and software in the Windows CE operating-system environment on their SH family of processors.

LinkUp System's L7200SDB Standard Development System Hardware User's Manual example

NeoMagic's LinkUp L7200SDB Standard Development System Hardware User's Manual describes a hardware and software development system for devices using their ARM-based L720x Internet system processor.

Tensilica Xtensa Software Development Toolkit User's Guide example

Tensilica's Xtensa Software Development Toolkit User's Guide describes their GNU tool chain that supports software development.

MIPS-based Tensilica Instruction Set Architecture (ISA) Reference Manual example

Tensilica's Xtensa Instruction Set Simulator (ISS) User's Guide describes the simulator for their configurable processor cores.

PortalPlayer Tango Software Developer's Guide example

AMD's SimNow Simulator 3.0 User Manual describes a software simulator that can accurately represent and debug a complete software system (applications, drivers, and OS).

PortalPlayer Tango Software Developer's Guide example

NVIDIA's PortalPlayer Tango Software Developer's Guide describes the API functions for a hardware-specific audio device driver and LCD.

IBM's PowerPC Tools catalog example

IBM's PowerPC Tools catalog describes the system-software and hardware tools that support system development based on PowerPC microprocessors.

IBM's PowerPC Compiler Writer's Guide example

IBM's PowerPC Compiler Writer's Guide describes how to write a compiler for microprocessors that run the PowerPC instruction set architecture (ISA).

Wind River (Diab Data) Run-Time Error Checker User Manual example

Wind River's Diab Data Run-Time Error Checker User Manual describes the error-checking functions of a compiler.

Synergy Semiconductor's System Elements Design Handbook example

Synergy Semiconductor's System Elements Design Handbook describes Synergy's high-speed emitter-coupled logic (ECL) circuit architecture and how to program it.

Philips-Signetics' SNAP Design Manual example

Philips-Signetics' SNAP Design Manual describes the programming language used to configure their programmable logic devices.

AT&T Bell Labs' SCHEMA User Guide example

AT&T Bell Labs' SCHEMA User Guide shows chip designers how to create circuit descriptions from schematic capture and logic libraries using both a graphical user interface and a programming language.

AT&T Bell Labs' SCHEMA User Guide example

AT&T Bell Labs' MIDAS User Guide describes how to use the system-level Min/max Delay-Ambiguity Simulator (MIDAS) for large IC designs.


Installation and Maintenance

PowerEN PCIe Card User Manual API example

IBM's PowerEN PCIe Card User Manual describes the installation and operation of this single-board computer for edge-of-network network applications.

Zircon's Installtion Guide for UNIX Platforms manual example

Zircon's Installation Guide for UNIX Platforms is for a middleware API that maps mission-critical applications to a pool of heterogeneous hardware and OS platforms.

Sony, Toshiba, IBM (STI) Cell Broadband Engine Hardware Initialization Guide example

The Sony, Toshiba, IBM (STI) Cell Broadband Engine Hardware Initialization Guide describes how to boot and test this multicore processor.

Raychem's Chemelex Auto-Trace Pipeline Heating System Installation and Operations Manual example

Raychem's Chemelex Auto-Trace Pipeline Heating System Installation and Operations Manual describes a pipeline heating system used in chemical processing plants.

Varian's 3190 Cassette-to-Cassette Sputtering System Maintenance Manual example

Varian's 3190 Cassette-to-Cassette Sputtering System Maintenance Manual describes the maintenance procedures for this electro-mechanical-chemical manufacturing machine.

Varian's MDP-1000 Disk Sputtering System Maintenance Manual example

Varian's MDP-1000 Disk Sputtering System Maintenance Manual describes the maintenance procedures for this disk sputtering system.


Electric Energy and SCADA Control Systems

Electric Reliability Council of Texas (ERCOT) Customer Move-Out State Transitions example

This Electric Reliability Council of Texas (ERCOT) Customer Move-Out State Transitions diagram defines building move-out scenarios based on Karnaugh maps that we devised.

MIPI Alliance MIPI) Alliance's Specification for System Power Management Interface (SPMI) example

The Mobile Industry Processor Interface (MIPI) Alliance's Specification for System Power Management Interface (SPMI) specifies a power-management interface used in cell phones and mobile devices.

Electric Power Research Institute (EPRI) Load-Management Strategy Testing Model (LMSTM) Reference Guide example

Electric Power Software's Load-Management Strategy Testing Model (LMSTM) Reference Guide describes a modeling systems for electric-power energy management.

Electric Power Research Institute (EPRI) Load-Management Strategy Testing Model (LMSTM) Quick Guide example

The Electric Power Research Institute (EPRI) Load-Management Strategy Testing Model (LMSTM) Quick Guide describes a modeling systems for electric-power energy management.

Electric Power Research Institute (EPRI) User's Guide to the Over/Under Capacity Planning Model example

The Electric Power Research Institute (EPRI) User's Guide to the Over/Under Capacity Planning Model describes simulation and modeling systems for electric-power capacity planning.

Energy Management Associates (EMA) PROMOD III Production Costing Model User's Manual example

The Energy Management Associates (EMA) PROMOD III Production Costing Model User's Manual describes methods for estimating the cost of electric-power production.

Saudi Consolidated Electric's SICON Jubail System Engineer's Manual example

Saudi Consolidated Electric's SICON Jubail System Operator's Manual describes the operations of a SCADA system for airports and electric-power systems in Saudi Arabia.

Saudi Consolidated Electric's SICON Jubail System Engineer's Manual example

Saudi Consolidated Electric's SICON Jubail System Engineer's Manual describes the engineering maintenance of a SCADA system for airports and electric-power systems in Saudi Arabia.


Neural Networks and Pattern Recognition

Nestor's Ni1000 Recognition Accelerator User's Guide example

Intel/Nestor's Ni1000 Recognition Accelerator User's Guide describes the Ni1000 chip's real-time classification of patterns using artificial neural-network radial basis function (RBF) algorithms.

Nestor's Ni1000 Recognition Accelerator User's Guide example

Here is an excerpt from Nestor's Ni1000 Recognition Accelerator User's Guide that summarizes the methods by which the chip recognizes data patterns.

Intel/Nestor Ni1000 Recognition Accelerator Technical Specification example

Intel/Nestor's Ni1000 Recognition Accelerator Technical Specification describes a classification engine for pattern recognition.

Intel 80170NX Neural Network Solutions Brochure example

Intel's 80170NX Neural Network Solutions Brochure summarizes their electrically trainable analog neural network chip.

Intel 80170NX Electrically Trainable Neural Network Data Sheet example

Intel's 80170NX Electrically Trainable Neural Network Data Sheet describes an electrically trainable analog neural network chip.

Intel 80170NX Electrically Trainable Neural Network Data Sheet example

We developed the hardware for two audio synthesizers, based on Intel neural-network chips. One box had its world premier concert at the Paris Opera House with the Merce Cunningham Dance Company.

Intel 80170NX Electrically Trainable Neural Network Data Sheet example

We wrote this article for Dr. Dobbs Magazine that describes our neural-network audio synthesizers.


Industrial and Automotive

AMS AS5048 Magnetic Rotary Encoder Datasheet example

AMS' AS5048 Magnetic Rotary Encoder Datasheet describes a a family of magnetic rotary encoder chips.

Trinamic's TMC262 Datasheet example

Trinamic's TMC262 Datasheet describes a semiconductor and driver for stepper motors used in automotive and industrial applications.

Trinamic's TMC262 Datasheet example

Trinamic's Trinamic TMC262 Evaluation Manual describes a a board with TMC262 chip, power MOSFETs, and a microcontroller. It interfaces to a PC for visualization and control of parameters.

Infineon's Hall-Effect Integrated Switches and Latches Application Note example

Infineon's Hall-Effect Integrated Switches and Latches Application Note describes a magnetic-field-sensing microchip used in industrial and automotive applications.

Raychem's Chemelex Auto-Trace Pipeline Heating System Installation and Operations Manual example

Raychem's Chemelex Auto-Trace Pipeline Heating System Installation and Operations Manual describes a pipeline heating system used in chemical processing plants.

Texas Instrument's National Semiconductor FASTr Advanced BiCMOS Logic Databook example

Texas Instrument's National Semiconductor FASTr Advanced BiCMOS Logic Databook describes the signal interface and programming of a family of BiCMOS semiconductor chips.

Raychem's Chemelex Auto-Trace Pipeline Heating System Installation and Operations Manual example

WaferScale Integration's PAC1000 Microcontroller Data Sheet describes the signal interface and programming of a microcontroller chip.

Signetic's 8X305 Bipolar Microcontroller User's Manual example

Signetic's 8X305 Bipolar Microcontroller User's Manual describes the signal interface and programming of the industrial microcontroller.


Semiconductor Processing

Optical Associates, Inc. TriSOL 300mm Solar Simulator User Manual example

OAI's TriSOL 300mm Solar Simulator User Manual describes the operation of this solar simulator for 300mm wafers.

Optical Associates, Inc.  Model 5000 and 8000 Auto-Load Mask Alignment System User Manual example

OAI's Model 5000 and 8000 Auto-Load Mask Alignment System User Manual describes the operation of two mask aligners.

ASM Lithography (ASML) DSM Design Reference example

ASML's DSM Design Reference describes one of their software tools for semiconductor mask lithography.

Varian's 3190 Cassette-to-Cassette Sputtering System Operation Manual example

Varian's 3190 Cassette-to-Cassette Sputtering System Operation Manual describes an electro-mechanical-chemical manufacturing machine for semiconductor chips.

Varian's 3190 Cassette-to-Cassette Sputtering System Maintenance Manual example

Varian's 3190 Cassette-to-Cassette Sputtering System Maintenance Manual describes the maintenance procedures for this electro-mechanical-chemical manufacturing machine.

Varian's MDP-1000 Disk Sputtering System Operator's Manual example

Varian's MDP-1000 Disk Sputtering System Operator's Manual describes how to operate this disk sputtering system.

Varian's 3190 Cassette-to-Cassette Sputtering System Operation Manual example

GlaxoSmithKline's Branson/IPC Sigma 80 Technical Brochure gives a graphic overview of a plasma etching system used to make integrated circuits.

Varian's 3190 Cassette-to-Cassette Sputtering System Operation Manual example

GlaxoSmithKline's SmithKline Beecham Branson/IPC 6120 Plasma Etching System User's Manual describes describes how this plasma etching system is used to make integrated circuits.


Testing

SÜSS MicroTec's Micron Force Instruments (MFI) Real-Time Prober User's Guide example

SÜSS MicroTec's Micron Force Instruments (MFI) Real-Time Prober User's Guide describes a real-time IC wafer prober.

Optical Associates, Inc. TriSOL 300mm Solar Simulator User Manual example

OAI's TriSOL 300mm Solar Simulator User Manual describes the operation of this solar simulator for 300mm wafers.

Near Field Communication (NFC) Forum's Test Cases for Digital Protocol example

The Near Field Communication (NFC) Forum's Test Cases for Digital Protocol specifies the test methods to be used for near-field devices.

Nanosphere Verigene Molecular Diagnostics System User's Manual example

Nanosphere's Verigene Molecular Diagnostics System User's Manual describes a molecular diagnostics workstation used in medical and molecular biology research and clinical testing.

Fluke 9100A/9105A Automated Operations Manual example

Fluke's 9100A/9105A Automated Operations Manual describes an automatic testing system for semiconductor circuit boards.

KLA-Tencor Flatgage Wafer and Photomask Flatness Tester Data Sheet example

KLA-Tencor's Flatgage Wafer and Photomask Flatness Tester Data Sheet is a specification and quick guide for this wafer and photomask flatness tester.

KLA-Tencor's Alpha-Step 200 Data Sheet example

KLA-Tencor's Alpha-Step 200 Data Sheet describes and illustrates the electromechanical properties and operation of this semiconductor test instrument.

KLA-Tencor's M-Gage 200 and Sonogage 200 Calibration Quick Card example

KLA-Tencor's M-Gage 200 and Sonogage 200 Calibration Quick Card summarizes resistance and thickness tests for wafers and photomasks.


How To Write

How to write engineering specifications

Our presentation on how to write an engineering specification. It's available for download.

How to use editing tools for engineering specifications

Our presentation on how to use editing tools for writing engineering specifications. It's available for download.


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