Our technical writers write documentation about configurable embedded processors, including those with DSP and vector-processing architectures and those implemented as intellectual-property (IP) cores for applications such as communications systems and Internet appliances. This Tensilica reference manual describes a MIPS-compatible instruction-set architecture (ISA).

• Length: 530 pages.
• Audience: Embedded-system developers.
• Service Performed: Partial original manuscript, editing, and camera-ready art.
• Also see the related Tensilica Xtensa Software Development Toolkit User's Guide, Xtensa Instruction Set Simulator (ISS) User's Guide, and Instruction Extension (TIE) Reference Manual.