Warthman Associates, Technical Writer
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Project Details


Our technical writers write documentation about circuit-design and simulation tools for semiconductor logic, including ASICs, gate arrays, PLDs, FPGAs, reconfigurable logic, microprocessors, network processors, and systems-on-chip (SOCs). This Synergy manual describes a family of emitter-coupled logic (ECL) gate array products.

Synergy Semiconductor System Elements ECL Design Handbook

  • Length: 180 pages
  • Audience: Circuit designers
  • Service Performed: Complete original manuscript and camera-ready art
  • Short Excerpt: Gate-Array Design Principles (30 Kbyte PDF)

 

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